DDR3 SDRAMQ: 16GB DDR3, 4GB i le fasi pepa, 16bit Data Bit Data Bid SPI Flash: Tasi le fasi 128MBITQSPIFLASH, lea e mafai ona faʻaogaina mo faila faʻatulagaina FPGA ma faʻamaumauga faʻamaumauga a le tagata faʻaoga FPGA Faletupe tulaga faʻafesoʻotaʻi: fetuutuunai 1.8V, 2.5V, 3.3V eletise. Afai e te manaʻomia le suia o le maualuga, e naʻo lou manaʻomia e sui le tulaga tutusa o le maneta lopa e ausia ai fetuunaiga. Autu laupapa sapalai malosiaga: 5V-12V laina o le sapalai eletise EEPROM; M24C02-WMN6TP e fa'avae ile masini pasi I2C. Mulimuli i le auala amata o le laupapa autu o le laina lona lua protocols: lagolagoina e lua auala amata, o le JTAG, QSPI Flash connectors. taulaga fa'alautele, 120pin, Panasonic AXK5A2137yg MP5700 ipu pito i lalo SFP atina'e: 2 modules opitika e mafai ona ausia maualuga-saosaoa alava fesootaiga, e pei o le 6GB / s pito i lalo uati ipu: 1 200MHz faasinoupu uati fesootai i le laupapa autu MRCC uati tube vae, 1 125MHz O le GTX uati paipa vae ipu pito i lalo o le uati e fesootai i le laupapa autu o le 40 -pine faalautele uafu: faasao se 2.54mm standard spacing 40 -shot faalautele uafu, lea e faaaoga e fesootai le tagata faatau lava mamanu module. Essence Core uati laupapa: e tele fa'apogai uati i luga o le laupapa. E aofia ai le 200MHz system clock, le 125MHz GTX clock, ma le 66MHz EMCCLK clock. JTAG taulaga: 10 su'i 2.54mm tulaga JTAG taulaga, mo le downloading ma debugging LEDs mo polokalame FPGA: o se aofaiga atoa o 6 mumu moli moli i totonu o le laupapa autu, e faailoa ai le sapalai mana o le pepa laupapa, 4 faailo faailoilo moli ma FPGA IO vae tube feso'ota'i sa'o Ki: 4 ki. 4 ki. O latou FPGA reset buttons, Program_b ki ma lua fa'aoga ki.
O le FPGA Xilinx-K7 Kintex7 XC7K325 410T o se faʻataʻitaʻiga faʻapitoa o le FPGA (Field-Programmable Gate Array) na atiaʻe e Xilinx. O nisi nei o fa'amatalaga autu e uiga i lenei FPGA: Fa'asologa: Kintex-7: Xilinx's Kintex-7 faasologa FPGAs ua mamanuina mo talosaga maualuga-faatinoga ma ofoina atu se paleni lelei i le va o le faatinoga, mana, ma le tau.Measini: XC7K325: E faasino i le mea patino. masini i totonu o le Kintex-7 faasologa. O le XC7K325 o se tasi o fesuiaiga o loʻo maua i lenei faʻasologa, ma e ofoina atu ni faʻamatalaga patino, e aofia ai le gafatia o le cell logic, fasi DSP, ma le I / O count.Logic Capacity: O le XC7K325 o loʻo i ai le gafatia o le cell logic o 325,000. O sela fa'akomepiuta o poloka faufale e mafai ona fa'apolokalameina i totonu o se FPGA e mafai ona fa'atulagaina e fa'atino ai ta'aloga numera ma galuega. O le numera saʻo o fasi pepa DSP i le XC7K325 e mafai ona fesuisuiaʻi e faʻatatau i le eseesega. O nei pine e mafai ona faʻaogaina e faʻafesoʻotaʻi ma masini fafo poʻo isi masini komepiuta.O isi Faʻamatalaga: O le XC7K325 FPGA atonu e iai isi mea, e pei o poloka faʻapipiʻi faʻapipiʻi (BRAM), transceiver televave mo fesoʻotaʻiga faʻamatalaga, ma filifiliga faʻaopoopo eseese. E taua tele ia maitauina o FPGA e pei o le Xilinx-K7 Kintex7 XC7K325 o masini e mafai ona faʻaogaina e mafai ai e oe ona faʻatinoina le faʻaogaina o numera numera ma galuega e ala i le faʻapipiʻiina o latou sela. O lenei fetuutuunai e mafai ai ona talafeagai mo le tele o faʻaoga, e aofia ai le faʻaogaina o komipiuta maualuga, faʻasologa o faʻailoga numera, ma le faʻavaveina o meafaigaluega.